2023

Some of the main activities and results that have been obtained during the third stage of our grant can be summarized bellow:

Articles in ISI journals: 3

D.F. Chiper, “An Improved VLSI Algorithm for an Efficient VLSI Implementation of a Type IV DCT That Allows an Efficient Incorporation of Hardware Security with a Low Overhead,” Electronics 2023, 12, 243. https://doi.org/10.3390/electronics12010243; Impact factor: 2.9 (2022) – Q2
D.F. Chiper and C. Paleologu, “Efficient Algorithms and Architectures for DSP Applications,” Electronics, vol. 12, no. 4, p. 1012, Feb. 2023, doi: 10.3390/electronics12041012; Impact factor: 2.9 (2022) – Q2
D. F. Chiper and A. Cracan, “An Efficient Algorithm and Architecture for the VLSI Implementation of Integer DCT That Allows an Efficient Incorporation of the Hardware Security with a Low Overhead,” Applied Sciences, vol. 13, no. 12, p. 6927, Jun. 2023, doi: 10.3390/app13126927; Impact factor: 2.7 (2022) – Q2
D. F. Chiper and A. Cracan, “New Systolic Array Algorithms and VLSI Architectures for 1-D MDST,” Sensors, vol. 23, no. 13, p. 6220, Jul. 2023, doi: 10.3390/s23136220; Impact factor: 3.9 (2022) – Q2
A. Aliouat, N. Kouadria, D.F. Chiper, “x-DTT: A package for calculating real and Integer Discrete Tchebichef Transform kernels based on orthogonal polynomials,” SoftwareX, Volume 23, 2023, 101441, ISSN 2352-7110, doi: 10.1016/j.softx.2023.101441; Impact factor: 3.4 (2022) – Q2

D. F. Chiper and R. Matei, “Polyphase Implementation for Gaussian 2D FIR Filters with Circular Symmetry,” 2023 15th International Conference on Electronics, Computers and Artificial Intelligence (ECAI), Bucharest, Romania, 2023, pp. 01-06, doi: 10.1109/ECAI58194.2023.10194150.
D. F. Chiper and R. Matei, “Efficient Design and Implementation of 2D Zero-Phase Circular FIR Filters,” 2023 International Symposium on Signals, Circuits and Systems (ISSCS), Iasi, Romania, 2023, pp. 1-4, doi: 10.1109/ISSCS58449.2023.10190926.

Some of the main activities and results that have been obtained during the second stage of our grant can be summarized bellow:

D.F. Chiper, A. Cracan, V.D. Andries, “An Overview of Systolic Arrays for Forward and Inverse Discrete Sine Transforms and Their Exploitation in View of an Improved Approach,” Electronics 2022, 11(15), 2416; https://doi.org/10.3390/electronics11152416; Impact factor: 2.69 (2021)

D.F. Chiper,” A new integer algorithm for an efficient VLSI implementation of DST using obfuscation technique,” Journal of Engineering Sciences and Innovation, Technical Sciences Academy of Romania, jesi.astr.ro , JESI, vol. 7, no. 1, pp. 97-104, 2022
D.F. Chiper,”A Hardware Accelerator for the Computation of Modified Discrete Sine Transform,” Annals of the Academy of Romanian Scientists, Series of Sciences and Technology of Information, vol. 14, no. 1-2, pp. 57-66, 2021 (sent and published in 2022)

D.F. Chiper, ”An Improved Algorithm for the VLSI Implementation of Type II Generalized DHT that Allows an Efficient Incorporation of Obfuscation Technique,” 45th International Conference on Telecommunications and Signal Processing (TSP 2022), Prague, Czech Republic, 2022
D.F. Chiper, A. Cracan, “A New Integer Algorithm for a VLSI Implementation of DCT Using Obfuscation Technique,” 14th International Conference on Communications (COMM 2022), 16-18 June 2022, Bucharest, Romania, 2022
D.F. Chiper, A. Cracan, “A New VLSI Algorithm for a VLSI Implementation of MDST using Obfuscation Technique,” International Symposium of Electronics and Telecommunications (ISETC 2022), Timisoara, Romania, 2022
D.F. Chiper, L-T. Cotorobai, “An Improved Algorithm for an Efficient VLSI Implementation of Type IV DST using Short Quasi-Band Correlation Structures,” 14th International Conference on Electronics, Computers and Artificial Intelligence (ECAI 2022), Romania, 2022

Some of the main activities and results that have been obtained during the first stage of our grant can be summarized bellow:

The main hardware security techniques used at present were reviewed and analyzed and the most suitable technique for incorporation in the selected multimedia modules was selected.

New computational structures were developed within new VLSI algorithms that were used for:
- Efficient VLSI implementation of several key modules used in multimedia applications
- Efficient incorporation of hardware security techniques known as Obfuscation techniques

Adequate computational structures have been found within new VLSI algorithms in which only small integers are used and that allow an efficient implementation of multiplication circuits

Efficient restructuring techniques have been developed for the algorithms used for the selected multimedia modules to highlight the respective computational structures.

D.F. Chiper, “A Structured Fast Algorithm for the VLSI Pipeline Implementation of Inverse Discrete Cosine Transform,” Vol.:(0123456789) Circuits, Systems, and Signal Processing, April, 2021, Impact factor: 2.22 (2020)
D.F. Chiper, L-T. Cotorobai, “A New Approach for a Unified Architecture for Type IV DCT/DST with an Efficient Incorporation of Obfuscation Technique ,” Electronics 2021 10(14) 1656; https://doi.org/10.3390/electronics10141656; Impact factor: 2.39 (2020)

D.F. Chiper, A. Cracan, “An Efficient Algorithm for the VLSI Implementation of the Inverse DST Based on Quasi-Band Correlation Structures”, Proceedings of the International Symposium on Signals, Circuits and Systems, ISSCS 2021, Iași, România
D.F. Chiper, L.-T. Cotorobai, “An Efficient Algorithm for the VLSI Implementation of Inverse DCT Based on Quasi-Circular Correlation Structures”, Proceedings of 15th International Conference on Advanced Technologies, Systems and Services in Telecommunications, TELSIKS 2021, Niš, Serbia

D.F. Chiper, „Un Nou Algoritm Bazat pe Numere Intregi pentru o Implementare VLSI Eficientă a Transformatei DST utilizând Obfuscation Technique”, A XVI – a ediție a Conferinței Zilele Academiei de Științe Tehnice din România (ASTR) 2021